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r3wst3r
r3wst3r Posts: 1
edited November 2023 in LFD210 Class Forum

Hi! I'm just checking out the course and getting the lay of the land.
It was looking a little empty so I decided to post an icebreaker.

Comments

  • FerdiVHL
    FerdiVHL Posts: 1

    Hi!

    Just started the course here!

    How's it going?

  • solidgriever
    solidgriever Posts: 2

    Oh hi. Same. Nice Hackers meme :D . Haven't started yet... so maybe it is addressed in the course but do you or anyone have a good recommendation of a nice/cheap/capable risc-v dev board?

  • miahfost
    miahfost Posts: 1

    @solidgriever - I don't know how good it is yet, but I bought the StarFive VisionFive 2 to do the course work on. It's not out of the box yet so nothing to report so far.

  • solidgriever
    solidgriever Posts: 2

    I got ESP32-C3-DevKitM-1 this is also connected with a book RISC-V Assembly Language Programming using ESP32-C3 and QEMU (+ FREE ESP32 RISC-V Board) will report if it was worth it.

  • dasunpathirage
    dasunpathirage Posts: 1

    Hello, I'm following the Cw in LFD210 encoding of opcodes content can someone verify this

    _ Major Opcode and Funct3 (Minor Opcode) Using Correct Bit Ranges_

    Quadrant Selection and Length Recognition Using Correct Bit Ranges

    Quadrant Selection (inst[1:0]):

    The quadrant selection is represented by the first two bits of the instruction (inst[1:0]).
    Quadrants 00, 01, and 10 typically represent 16-bit Compressed Instructions, while quadrant 11 is used for 32-bit (or higher) instructions.

    Length Recognition:

    The length of the instruction can be recognized by examining the first few bits, particularly the first two bits (inst[1:0]).
    If the instruction begins with 00, 01, or 10, it's identified as a 16-bit instruction. If it begins with 11, it's identified as a 32-bit (or higher) instruction
    If it begins with 11 and the next three bits are not all 1s (111), it's identified as a 32-bit instruction. (11111)11011-00000.

    Major Opcode (inst[6:0]):

    The major opcode is represented by bits 6 to 0 of the instruction (inst[6:0]).
    For example, inst[6:0] = 0000000 might indicate Arithmetic Instructions, while other values would represent different major opcodes.

    inst[4:2] for Base Major Opcode

    inst[4:2] is used to differentiate between different functional categories or groups within the instruction set.
    It helps identify the broad category or family of operations that the instruction belongs to.

    inst[5:6] for Base Major Opcode

    inst[5:6] is used to further refine the categorization of instructions within the same broad functional category identified by inst[4:2].
    It helps provide additional granularity or differentiation within the major opcode group.

    Funct3 (inst[14:12]):

    The funct3 field, or minor opcode, is represented by bits 14 to 12 of the instruction (inst[14:12]).
    Within certain major opcode categories, different values of inst[14:12] specify specific variants or sub operations of the same major opcode.

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